Hog Local#
- Project Configuration File
- Specifying the IDE Tool and Version
- Project Description
- Main Section: Project Variables
- Synthesis and Implementation Sections (AMD Only)
- Parameters Section (AMD Only)
- Hog Section
- Generics Section
- Vitis section (platform and app)
- HLS section (Vitis Unified only)
- XSA Export for Zynq Devices (AMD Only)
- Passing Generics to BD IPs
- Vivado & Vitis Projects
- List Files
- Hog Buttons
- Simulation
- Design Hierarchy
- Parameters/Generics
- Custom User Tcl scripts in build flow
- Custom
Hog/Docommands - Templates
- Hog flavour
- Additional Tcl Scripts
- Hog and IPbus
- List of supported tools
- Vitis Unified High-Level Synthesis (HLS)
- Hog and Sigasi
- Intellectual Properties (IP)
- User IPs
- Using Hog with Libero SoC
- Using Hog with Libero SoC
- Coloured Output Logs
- Instructions for Windows users
- CocoTB support
- VHDL-LS Support