Hog Local

Warning

Outdated Documentation! This documentation version is out of date. Please check the latest version 2026.1.

• Project Configuration File
  • Specifying the IDE Tool and Version
    • Why Specify the Tool Version?
  • Project Description
  • Main Section: Project Variables
    • PART
    • FAMILY
  • Synthesis and Implementation Sections (Xilinx Only)
  • Parameters Section (Xilinx Only)
  • Hog Section
  • Generics Section
  • XSA Export for Zynq Devices (Xilinx Only)
  • Passing Generics to BD IPs
• List Files
  • Source List Files (.src)
    • File Properties for Vivado Projects
    • File Properties for Quartus Projects
    • Intel Platform Designer Systems
  • Simulation List Files (.sim)
  • Constraint List Files (.con)
  • List Files Are Recursive
  • External List Files (.ext)
• Hog Buttons
  • Adding the Buttons to the Vivado GUI
  • Button functionalities
    • The check button
    • The list button
    • The configuration button
    • The simulation button
• Simulation
  • Hog Simulation List Files (Hog2025.2)
  • Generics Section (Vivado Only)
  • Hog Section (Vivado Only)
  • Project Simulator
    • Simulation Library
  • The sim.conf File
  • Simulation in CI
  • Simulating Without GUI
  • GHDL Simulations
• Parameters/Generics
• Custom User Tcl scripts in build flow
  • User Tcl scripts at project-creation time
  • User Tcl scripts during the workflow
• Templates
  • hog.conf
  • top.vhd
  • top.v
  • github-pull.yml
  • github-main.yml
  • github-tag.yml
  • gitlab-ci.yml
  • gitlab-ci_dynamic.yml
  • gitlab-ci_parallel.yml
  • ci.conf
  • gitignore
  • doxygen.conf
  • repo.conf
• Hog flavour
  • What is Hog’s flavour?
  • Possible use cases
• Additional Tcl Scripts
  • check_syntax.tcl
  • check_list_files.tcl (VIVADO ONLY)
  • add_hog_custom_button.tcl (VIVADO ONLY)
  • compile_simlib.tcl (VIVADO ONLY)
  • make_doxygen.tcl
  • check_yaml_ref.tcl
  • generate_yaml.tcl
  • reformat.tcl
• Hog and IPbus
  • Embedding of version and SHA in the XML files
  • List files with .ipb extension
    • IPbus xml files
  • Check address maps against xml file
  • Generation of VHDL address maps
• List of supported tools
• Hog and Sigasi
• Intellectual Properties (IP)
  • Keep the IP locked (Vivado only)
  • XCIX (IP Core Containers)
    • IP initialisation files (.coe, .mif)
  • Creating the IPs/BDs with a Tcl script (Hog > 2022.1, Vivado Only)
  • Speed up the IP synthesis (Optional)
• User IPs
• Using Hog with Libero SoC
  • Tcllib
  • Libero IP Cores
  • CI requirements
  • Simulations
• Using Hog with Libero SoC
  • Tcllib
  • Lattice Diamond’s IPs
  • Simulations
• Coloured Output Logs
  • Coloured output
  • Save Logs
  • Hog Environmental configuration files
    • Project HogEnv.conf
      • Options
    • Home HogEnv.conf
• Instructions for Windows users
  • Os related issues